Simulation of correlation power analysis against AES cryptographic chip
Fang Ren · Jisuanji gongcheng yu sheji · 2010
The power leakage principle of CMOS device is introduced,power leakage model of AES is constructed and the simulation method of correlation power analysis is designed.With comparing the correlation index between the power consumption of guessed partial key and the real key,the validity of the guessed partial key is confirmed by this method,with the same method,the rest part of key is achieved.This method reveals the vulnerability of AES implementation without any countermeasure to CPA attacks.