High Speed Serial Data Acquisition System Based on JESD204 Protocol
Ran Ya · Electronic Science and Technology · 2015
In systems where communication infrastructure,imaging equipment,and industrial instrumentation need large data,it is needed that the data conversion stage provides increasingly wide resolution and high sampling rate. The parallel interface's physical layout and the serial LVDS method's bit rat bring technical barriers to designers. In this paper,the JESD204 B protocol is realized based on Xilinx Vertx6 FPGA's GTX,which helps solve the problems in traditional data acquisition parallel transmission.