Design of DDFS based on FPGA and its implementation
Xiaozhou Dong · Information technology newsletter · 2007
Direct digital frequency synthesis is used widely in communication and signal processing.The design of DDFS with FPGAs is much flexible and programmable than special CMOS chip.This paper introduces the arithmetic principle of DDFS with FPGA and it also presents how to select the parameters which can improve system capability with PLD optimization method.This design implements the DDFS logic with VHDL and Altera ACEX EP1K30 device and finishes the timing simulation in Quartus II software.Finally the simulation program is given by the Mathworks MATLAB language.