A Design Method of Digital Reconfigurable Channel-separation Technique
Yue Tia · Radio Engineering · 2013
In this paper,a design method of digital reconfigurable channel-separation is proposed. It is a design of serial configuration for polyphase array-FFT algorithm,in which the polyphase filter banks and FFT stage number are reconfigurable flexibly according to the channel number. Even up to hundreds of channels are configured. The paper presents in detail the implementation of the polyphase filter banks and FFT,two main modules involved in the design methods of digital reconfigurable channel-separation. Finally,the paper realizes 4-,8-,16- channel FPGA design with this design method. In addition,the hardware resource occupation and BER are presented,to prove the feasibility of this design method.