Direct digital frequency synthesizer based on improved CORDIC module
Xin Wang · Computer Engineering and Applications Journal · 2010
An improved algorithm based on the traditional fixed-point pipelined CORDIC-based algorithm is proposed to reduce number of iterations and realize the sign prediction in parallel processing.Improved algorithm not only greatly reduces the pipeline iterations but also saves the number of Slice Flip Flops of FPGA.Finally using this algorithm the Direct Digital frequency Synthesize(rDDS) at Xilinx's Virtex-II platform is realized.