Design of Novel FFT Processor Based on CMMB Standard
Xin Chen · Video Engineering · 2009
A novel 4 096/2 048 points FFT pipeline architecture is presented suitable for China Mobile Multimedia Broadcasting(CMMB) system.In this article,the processor is designed for 4 096/2 048 samples with 13 bit bit-width and fixed point by using mixed radix-4/2 decimation in frequency FFT algorithm.Besides,to reduce hardware consume,the processor can either implement 2 048 or 4 096 points FFT by controlling the data-flow between stages.The whole design is described in VerilogHDL and simulated on FPGA.