Layout design and verification of SoC chip based on MCU
Rongshan Wei · Fuzhou daxue xuebao. Ziran kexue ban · 2011
An SoC chip for digital meter reading system is designed based on MCU.Multiple hard macro cells are integrated into the SoC chip.By separating the digital and analog modules,the layout is designed using SMIC 0.18μm 1P6M process.After layout design,the equivalence verification,static timing verification,post-layout simulation,and physical verification using Calibre based on Virtuso environment are carried out.The way to solve problems during layout design and verification is proposed.Finally,the SoC chip design meets the demand of timing and process.A 40 MHz working frequency,a 5.014 1 mm2 area,a 43.12 mW power dissipation,a 65.262 mV maximum voltage drop,and a 59.735 mV maximum earth rebound voltage are achieved.The electromigration and crosstalk are below threshold,and the post-layout simulation is successfully passed.