Traffic Modeling and Mapping of H.264 Encoder on 2D-Mesh Vs Application Specific NoC
Jian Liu · Jisuanji fangzhen · 2008
The continuous increasing demand of on-chip resources and the related bus problems of current SoCs have lead the engineers to research a new, scalable and more modular design methodology known as networks-on-chip. This contribution is related to simulation of traffic modeling and mapping of H.264 encoder on regular Vs application specific NoC architectures. Firstly the simulation related to analysis of traffic behavior between each module of H.264 encoder was proposed using distribution, fitting method. Then the modeling of important simulation parameters such as bandwidths, delays and packet size specific to H.264 encoder was developed. Later the modeled traffic behaviors and parameters were used to map the H.264 encoder on 2D-Mesh and proposed application specific NoC architectures. Finally the two architectures were compared against parameters such as average packet delay, packet loss rate and area using publicly available Network Simulator-2. In addition the transient behavior of the two NoCs was also compared to check the average packet delay. The results show that the application specific NoC comprises of less average packet delay, less packet loss ratio and consume less area.