Development of Design and Verification Languages for Systemonchip
Jungang Han · Modern Electronic Technique · 2005
EDA tools for design and are changing rapidly as microelectronics progress and the SoC becomes popular, which contains microprocessors, memories, even analog and RF units , are becoming increasingly complex in function and scale. It is impossible to use traditional tools to finish the task of SoC. Thus it comes so called verification crisis problem. To meet the problem EDA tools are experienced rapidly and fundamental changes these years. The RTL based design and methodologies have to go up to the system level, and have led to advent of the languages and their standardization. This paper surveys the development and the trend of design and languages, analyses their advantages and disadvantages. Some comments on current methods are also given. and the assertion based method is emphasized.