A Median Filtering Processor Based on Transport Triggered Architecture
Wei Ji-zeng · Microprocessors · 2012
In order to solve the problem that the speed of classical median filter was slow,this paper proposed a specific processor based on Transport Triggered Architecture,which substantially improved the speed of median filtering process.Compared with the general purpose processors,this processor introduced two dimension addressing mode accessing to the data memory in its data storage unit.It reduced the use of addition and multiplication instruction in addressing data memory hereby increasing the data addressing speed.A special sorting function unit is proposed in this processor,which can decrease the loadage demand of compare jump instruction in sorting algorithm.The simulation and verification results show that this processor has greatly improved the efficiency of medium filter processing compared with the traditional general-purpose processor used RISC architecture.