Comparative Analysis of New Low-Power Single-and Double-Edge Flip-Flops

Zhong Chuanjie · 2010

A novel edge flip-flop was designed based on study of power consumption theory and time characteristics of edge flip-flops.Results from Spectre simulation based on SMIC's 0.35 μm CMOS standard process showed that the delay and power consumption of the novel edge flip-flop was reduced by 48% and 26.22%,respectively,compared with the conventional structure.Furthermore,in the new design,the double-edge flip-flop had a delay and power consumption 36% and 19% lower,respectively,than the single-edge flip-flop.It can be concluded that the novel edge flip-flop,especially double-edge flip-flop,can not only reduce power consumption of IC's,but also speed up microsystems.

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