Design and Implementation of an Wideband Digitized Radar Quadrature Demodulation Receiver
Atr Lab · Signal Processing · 2005
A method to design efficient radar wideband digital quadrature demodulation receiver is described. The design condition is also given. Then an efficient 8-channel real-time radar signal quadrature demodulation receiver with this method is implemented based on FPGA. Finally, the performance of the receiver is tested. By comparing to the result of software demodulation, it shows the validity of the design.