A Study of On-Chip Non-Uniform Cache Architectures
Shubo Qi · Computer Engineering and Science · 2009
Large Caches have been adopted as the main components of microprocessors due to the scaling down of the integrated circuits technology. Wire delay has gradually become the performance bottleneck due to its increasing importance in the submicron technology. To accommodate those problems,new cache architectures are required. The Non-Uniform Cache Architectures(NUCA) support multiple access latencies and block migration,thus have the potential capability to reduce hit latency. There have been several different architecture models of NUCA. In this paper,the progress in the architecture models of NUCA is studied,especially the architecture models of NUCA for on-chip multi-processors are described in detail. Then,comparison and discussion of their respective merits and drawbacks are presented. Finally,the future research fields of NUCA architectures are listed.