Scalable Mapreduce Framework Design and Realization Based on FPGA
Guanzhong Dai · Computer Technology and Development · 2012
It presents a scalable Mapreduce framework on FPGA to accelerate commodity hardware.In this design,commodity hardware(CH) runs the main framework to communicate with file system in networks,while FPGA based platform is linked with CH to run Mapreduce tasks.Due to resource limited in one chip,more tasks can be extended to more FPGA platforms to achieve high-speed performance.A virtual device driver is designed in software to manage tasks running in special hardware.According to internal pipeline design and scalability,the design is proved that it allows better performance than commodity hardware,and also provides advantages in scalability and flexibility.