FPGA Implementation and Verification of High Speed Baseband Matching Filter
Simin Li · Modern Electronics Technique · 2007
Aimed at the signal processing characteristics of digitally-implemented baseband filter,putting forward a design project of FPGA implementation of high speed matching filter for high-order QAM demodulator in SDH digital microwave communication system.First,Based on the windows function design method,completed the software design and simulation of the filter.Then,based on the flat of Quartus II 6.0,used parallel pipelining structure and the parameter design method of the Verilog HDL,implemented FPGA design of the filter.At last,connected Quartus II and Matlab,ingeniously verified this filter from time field and frequency field.Practice proves that the filter is high-efficiency,facilitates debugging and can be reused or replanted easily.