Research and Implementation of Parallel Prefix Adder
Luo Min · Microelectronics & Computer · 2005
With the great increase of the speed of modern microprocessors, the need of fast adders becomes more exigent. When the technology has got the stage of deep submicron, the connective wire will play an important role either in the area or in the timing. Based on various CMOS technologies: 0.18μm, 0.15μm, 0.13μm and 90nm, this thesis makes a performance comparison with different bit widths, and then selects the adder architecture fit for deep submicron technology according to the impact of connective wires on adder performance in deep submicron technology.