FPGA Configuration Compression Algorithm
Lingli Wang · Jisuanji gongcheng · 2008
The reconfigurable system based on Field Programmable Gate Array(FPGA) has high performance and flexibility. With the enlarging of FPGA size,the dramatic increase in configuration data size has resulted in a corresponding increase in the time required for reconfiguration. This paper proposes a FPGA configuration compression algorithm——VLZW which can reduce the off-chip memory required for storing FPGA configurations. This algorithm cuts down the reconfiguration time of the system by reducing the transmittal configureation data.