A Solution of Cache Coherence in Heterogeneous Multi-processor Systems

Li N · Microcomputer Information · 2008

The development of SoC technology make many heterogeneous processor integrated go to a chip become possibility. This structure has become an important way to improve performance of microprocessors.An important issue in integrating multiple heteroge-neous processors on the same chip is to maintain the coherence of their data caches. In this paper, we discuss the cache coherence, with the sacrificing of simple hardware to completed the transformation of coherence protocol for adopting different snoopy protocol. The method can be incorporated in the wrapper to manage the data coherence among heterogeneous processors.

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