High Purity Agility Scheme Synthesizer
Guanghu Liu · Modern Electronic Technique · 2005
This paper introduces a kind of new L low noise and agility scheme synthesrer.In this scheme,the synthesizer contains two loops: one is working loop,the other is presetting loop.(That is to say: one loop is working,at the same time,the other loop is presetting the next frequency.The hop time isn′t influenced by lock time,therefore,the purity of the frequency is increased by depressing the width of the loop).The output frequency is 960~1160 MHz,the step is 10 MHz,the phase noise,the hop time and the spur curb.A detail design procession and a sample manufactured and the results of the sample are given.