Design of Square Root and Inverse Square Root Arithmetic Units for Mobile 3D Graphic Processing
Chan-Ho Lee · Journal of the Institute of Electronics Engineers of Korea · 2009
We propose hardware architecture of floating-point square root and inverse square root arithmetic units using lookup tables. They are used for lighting engines and shader processor for 3D graphic processing. The architecture is based on Taylor series expansion and consists of lookup tables and correction units so that the size of look-up tables are reduced. It can be applied to 32 bit floating point formats of IEEE-754 and reduced 24 bit floating point formats. The square root and inverse square root arithmetic units for 32 bit and 24 bit floating format number are designed as the proposed architecture. They can operation in a single cycle, and satisfy the precision of required by OpenGL 1.x ES. They are designed using Verilog-HDL and the RTL codes are verified using an FPGA.