Implementation of FFT Processor Based on Dynamic Partial Reconfiguration
Guangjun Li · 2009
A novel reconfigurable FFT architecture based on dynamic partial reconfiguration(DPR) was proposed.Compared with conventional FFT,the design is greatly improved in reconfigurable time.Meanwhile,reconfigurable units can be dynamically added to or removed from the processor.The reconfigurable parts features small size due to the use of the novel FFT control arithmetic.Simulation on Xilinx Virtex2p FPGA showed that the architecture has higher computing efficiency than Xilinx IPcore and exclusive characteristics of dynamic reconfiguration.