Design of n Frequency Divider Whose Duty Ratio is 1∶n Based on FPGA/CPLD
Qingfeng Li · Modern Electronics Technique · 2006
CPLD and FPGA are programmable logic devices.Digital systems designed by them have following merits: short development cycle,low cost of design and manufacture,advanced development tool,bulk article no testing,stable quality and online verify.Verilog HDL is a widely used hardware description language,which can be used to do various levels design,logical synthesis,simulation and timing analysis.The paper introduces characteristics and ranges of application of CPLD/ FPGA,and the design process and methods of digital logical circuits with Verilog HDL under Max+Plus II development software by taken as an example of a 5 frequency divider whose duty ratio is 1∶5.At last gives simulation waveform.