Design of SDRAM controller in high-resolution video image processing system
Xiaozhen Zhao · Modern Electronics Technique · 2013
The design of a FPGA-based the SDRAM controller for high-resolution video image processing is introduced in this paper.The SDRAM operating state is set to make it works in burst mode.SDRAM is controlled The video data is accessed by using the multi-line continuous SDRAM memory space under the control of the video time-sequence signals.The real-time storing and reading of video data are achieved under the control of pixel clock by increasing FIFO in the interface of video data to cache one line video.By changing the relevant parameters,all resolution video stream in the standard of VESA can be operated.It has the characteristics of versatility,low system complexity,high reliability and scalability.The image reversion function was achieved and the practicality of the controller was verified in a particular model of airborne large-screen display system by SDRAM controller.