The design of clock AD9516-3 and the application in IF digital systems
SI Xi-cai · Applied science and technology · 2009
The high-speed ADC requires more and more quality of clock.The authors presented a kind of low-jitterclock AD9516-3,which is designed based on synchronization regulator and jitter eliminator. The authors also analyzed the impact of clock jitter on SNR,and presented the design and application of AD9516-3 in IF digital receiver. A new test method of Signal Tap was introduced to test the quality of the clock. The test shows that the overall target meets the design requirements.