A Resource Optimizing Algorithm in FPGA Based High Speed FIR Digital Filters
Xing Zhang · Beijing Daxue Xuebao. Zirankexueban · 2009
The authors analyze the detailed process of calculator schedule in high speed FIR (finite impose response) digital filter with add-and-shift algorithm based on FPGA (field programmable gate array). Different calculation situations and related schedule schemes are discussed and a clear rule of optimization is proposed. At last,an example of a 16-order FIR filter is implemented on Xilinx Spartan 3 3s1000ft256 FPGA platform. The occupied resource is 11.7% less than the one generated without optimization and/or 29.7% less than the one generated by Xinlinx CoregenTM with distribute arithmetic (DA),respectively.