A Bayer CFA demosaicing method suitable for real-time hardware implementation
Zhiyong Xu · Electronic Instrumentation Customers · 2011
There are currently a lot of methods available for CFA demosaicing,however most of them are designed for off-line or post-processing purpose,requiring complex computing process or even iterations which are not suitable for real time hardware implementation.In this paper,a cost effective method for high definition Bayer pattern image demosaicking dedicated to compact hardware implementation is proposed.In order to reduce the time and resources required for hardware implementation,the proposed method focus on minimizing the computational load of the demosaicing process while preserving high image quality.A weighted gradient approach is adopted to the 3 by 5 neighborhood around each pixel to determine the two smoothest directions,along which the two missing colors are then interpolated.A comparison between our method and a commonly used demosaicking method is given in metrics like peak signal to noise ratio(PSNR) and CIELAB color difference.