Design and Improvement of a Frequency Synthesizer Based on Phase-locked Loop
Shujian Li · Telecommunication Engineering · 2010
In allusion to the problem of weak discernibility and long conversion time of phase-locked loop(PLL) frequency synthesizer,the DDS/PLL combined frequency synthesizer is used,and the frequency coversion time is as short as 80ns.By using gain-controllable amplifier circuit in output port,the problem that the intensity of signal will be decaying with the increasing of frequency can be solved effectively,and the signal amplitude can stay 1～1.05 V.The system structure,hardware and software composition are detailed.The experimental results are also given.