Side-Channel Resistance Implementation for FPGA
Wang Son · Communications technology · 2014
As the cryptographic algorithm is vulnerable to side-channel analysis during its operation,sidechannel resistance implementation for FPGA now becomes a hotspot of study. To counter this analysis,masking scheme in randomizing key-dependent data by addition of one or several random value( s)( the masks) is usually involved. This method may increase the hardware overhead and reduce the work efficiency while improving the security. SM4 implemented on an Altera FPGA by using certain masking scheme with location randomization indicates that the masking scheme does have certain influence on hardware overhead and work efficiency,but this is acceptable when area cost is not strictly limited. Experiment indicates that this masking scheme is of practical value in implementing crypto algorithm.