A Design and Implementation of GPS Jammer
Yanhong Kou · Microcomputer Information · 2009
Research on GPS jamming and anti-jamming has a very important significance.This paper presents a design of GPS jam-mer,and mainly analyses the intermediate frequency signal generation of the jammer.The generation of intermediate frequency signal is based on FPGA hardware platform,and the top-level design of FPGA makes Direct Digital Frequency Synthesis(DDS) as a core module,which could generate single frequency,swept frequency and wideband/narrowband interference signals at lower intermediate frequency.The AD9777 chip works as an Up-converter and DAC,which converts the digital waveform to analog signal at higher in-termediate frequency.Utilizing DDS to generate the lower intermediate frequency signal guarantees a small waveform distortion and AD9777 has reduced hardware resource.The simulation of FPGA design and practical test of the jammer are presented in the paper,both of which show that the design is correct and available.