Read and write of FIFO based on Flash
Wang Yi-ming · Jisuanji gongcheng yu sheji · 2009
In design of FPGA projects, it often need plenty of data. Due to the resouse of on-chip memory is limited, it often use SOPC technology to put the data into flash, then read the data out from it. But the frequency between Flash and disposing module usually dif- ference. In order to solve this problem, making use of FIFO in reading data is proposed. The performance and flexibility of the design is enhanced. Besides, it adopts two courses for reading and writing simultaneously, consequently, the speed is improved and the goal of real time better is obtained.