A study of SMT architecture for low power
Rongcai Zhao · Jisuanji gongcheng yu sheji · 2002
Superscalar and multiprocessing have encountered a challenge because of applications without enough and balance of ILP and TLP. But the simultaneous multithreading (SMT) processor is a kind of energy-efficient architecture which can takes a full use of the hardware resources and transforms TLP to ILP dynamically. With the goals of high performance and low power, this paper discusses and exploits the basic idea of SMT architecture, design technology, consideration on low power and the new problems which should be taken care and solved by the designers of operating system and compiler.