FPGA Design and Implementation of add-subtraction alternate algorithm Division
XU Yon · Microcomputer Information · 2008
Design and implementation an add-subtraction alternate algorithm division circuit,introduce the principle of division,presents the division circuit construction. The simulation and experiment results show that the algorithm is accurate and fast.FPGA time analyze shows that the speed of divider could be 85.16MHz. The circuits are simplify and efficient can be used in embedded or industrial automation applications.