ASIC Design for the 8B/10B Encoder of Fiber Channel
Ning Tang · Dianzi qijian · 2011
Nowadays,the 8B/10B encoding and decoding is widely used in high-speed serial data transmission.Based on logic analysis,inherent relationship between of 8B/10B code and encode method using Verilog HDL is investigated.With optimized logic gates,this method can be applied easily and effectively to high speed and low-power consumption FPGA design and ASIC design to form an IP core with a great reliability.Synthesis and simulative result based on Quartus Ⅱ EDA of Altera company are given.The tested results can be used in different rates of the designed high-speed encoding and decoding chip.