FPGA Implementation of Scalar Multiplication
Zou Hou-wen · Modern Electronics Technique · 2007
In this paper,we study the implementation of the scalar multiplication algorithm by the FPGA from practical aspect.We adopt Koblitz curve on GF(2163) recommended by P1363 and module of microprocessor.There are 8,830 ALUTs and 5 575 registers to construct the structure of scalar multiplication,and its running time is 184.52 μs to multiply.Speed of the scalar multiplication takes advantage position comparatively with same logic resource in domestic or abroad at present.