Analysis on Interconnect Delay and Signal In tegrity with 0.18 μm CMOS Technology
Jiaxing Sun · 2005
As the integrated circuits (ICs) are scaled into nanometer dimensions and operat e in gigahertz frequencies, interconnects are becoming more and more important. At the same time, interconnect scaling brings some new problems: interconnect de lay, signal integrity, timing closure and so on. In this paper, we analyze the i nterconnect and devices delay trend, as well as signal integrity problem with 0. 18 μm CMOS technology.