Integrated Circuit Implementation and Characteristic Analysis of a CMOS Chaotic Neuron for Chaotic Neural Networks
Han-Jeong Song, Gye-Dal Gwak · Journal of the Institute of Electronics Engineers of Korea · 2000
This paper presents an analysis of the dynamical behavor in the chaotic neuron fabricated using 0.8 single poly CMOS technology. An approximated empirical equation models for the sigmoid output function and chaos generative block of the chaotic neuron are extracted from the measurement data. Then the dynamical responses of the chaotic neuron such as biurcation diagram, frequency responses, Lyapunov exponent, and average firing rate are calculated with numerical analysis. In addition, we construct the chaotic neural networks which are composed of two chaotic neurons with four synapses and obtain bifurcation diagram according to synaptic weight variation. And results of experiments in the single chaotic neuron and chaotic neural networks by two neurons with the 2.5V power supply and sampling clock frequency of 10KHz are shown and compared with the simulated results.