Fair scalable scheduling architectures for input-queued switches
Jiangtao Han · Journal of Circuits and Systems · 2008
This paper presents a fair scalable scheduling architecture(FSSA) for input queued switches.In the FSSA, a large scheduler is realized by connecting several small scheduling devices and making them work in fair pipeline scheduling.The important feature of this architecture is that it can be configured as a large scheduler with high performance but without the capacity limitations due to the size of monolithic scheduling device.The simulation results show that the performance of the FSSA is better than or very close to that of other typical scheduling algorithms under high traffic load.