AES S-Box Circuit Implementation Based on Composite Field Arithmetic
Zhenglin Liu · 2008
A full-custom AES S-box architecture based on composite field is proposed.In this S-box,pass transmission gate(PTG) logic style is used to obtain a compact and low-power data-path circuit.Latches controlled by an asynchronous handshake circuit are inserted in the data-path to prevent propagation of the signal glitch,resulting in reduction of the total S-box circuit power.The property of resisting differential power analysis(DPA) attack of the S-box is improved by inserting random delay chains.The layout-simulations for the S-box circuit using 0.25 μm CMOS technology show that it has low power consumption and highsecurity,and remains small-area overhead as in the corresponding composite field S-box.