Design of a High Speed FIR Filter ASIC Using Distributed Arithmetic
Guangjun Li · 2007
Performances of FIR filters using MAC architecture and distributed arithmetic(DA) are compared,and the principle of distributed arithmetic is described.Performances of DA based FIR filters implemented in FPGA and IC chip are also compared.The design for testability of memory in ASIC design is dealt with and the influence of memory on placement and routing in IC design is analyzed.Finally,the layout design and FPGA verification of a DDC chip using DA based FIR filter is provided.