Design of Storage System Cache Based on RAID50
Zaihong He · Jisuanji gongcheng · 2007
The RAID50 model of multi-controller stripe and the two-level address mapped mode of the host virtual volume address to high array and low array stripe is designed for enhancing I/O access concurrency.The transmission efficiency between the Cache memory and storage media is improved by using extend block that consists of sequential I/O multi-block and equals with Cache page size as RAID50 transmission granularity.The hash link lookup algorithms on Cache descriptor block and the second chance replacement algorithms on Cache page access frequency count are designed.The concurrent policy of the host data receiving and storage device pre-reading is implemented.The results show that the design improves effectively the storage system I/O performance.