Research and Implementation of Asynchronous FIFO Based on FPGA
Xiaoya Fan · Microelectronics & Computer · 2007
This paper analyses the structure and key technique of asynchronous FIFO. In order to reduce the probability of metastability in the circuit, the paper presents a new method which implement asynchronous FIFO effectively. Aim at the asynchronous FIFO, this article also describes the verification experiment of the design and makes a perform compare between the two FIFO model. The result of measurement indicates that this design improves the frequency and the utilization of resources greatly.