The Research of Latch-up Preventing in CMOS Technology
Qian Zhu · Electronics & Packaging · 2014
With the development of CMOS process technology, CMOS VLSI circuit manufacturing has become mainstream, and widely applied rapidly reduced feature sizes in CMOS devices and the CMOS circuit, a CMOS circuit so that the reliability of the effect caused by the latch-up increasingly attentions. The paper described the concept of latch CMOS process, the serious consequences of the generation of latchup condition, the way conflict with the law, and the reasons for the latch from the layout analysis, process improvement, three circuit applications made some latch optimization measures to meet the requirements and improve the reliability of CMOS circuits.