Improving SMT Thread Schedule Policy Based on Threshold and Data Cache Prediction
Xiaoya Fan · Science Technology and Engineering · 2008
In SMT architecture, instructions can be fetched from multi-thread simultaneously to increase system performance. Thread schedule policy is an important case in point. Factors affect instruction queue efficiency are analyzed in detail. And on the base of the popular ICOUNT policy, an improving thread schedule policy based on threshold is proposed. In the policy, main factors affect queue efficiency are taken into account according to their influence degree. After simulation, the IPC value is increased by 4.141% compared with ICOUTNT policy. Afterwards, the distance between twice data cache miss are statistically analyzed, and a new data cache miss prediction method is presented and used in the threshold based thread schedule policy, which allows an additional IPC value increase by 0.65%.