Reconfigurable Design for AES Algorithm Based on FPGA
Jianzhao Liu · Journal of Yancheng Institute of Technology · 2009
Enciphering information is the way to ensure information safety.This paper realizes the AES algorithm in FPGA and decreases the hardware complexity and speeds up data processing via adopting equivalent decryption process,optimizing functions and realizing the key expansion working concurrently.The following simulation proves its correctness.