Technique for multi-core instruction-set simulator
Luo Han-qin · Jisuanji yingyong yanjiu · 2013
In order to improve the simulation speed of multi-core instruction-set simulator(ISS) with low complexity,this paper presented a technique,which combined the advantages of interpretive strategy and compiled strategy,to form a multi-core ISS quickly.This technique used pre-decoder technique,extendable single core structure,cache and TLB simulation in single core,and the multi-core scheduling compatibly.This technique had been applied on forming multi-core simulator ISD,which was based on IME-diamond multi-core DSP processor.Complexity analysis and the experiment results show that this technique improves the simulation speed with low complexity.