Design of a Radar Signal Processor Based on DSP and FPGA
Yueli Li, Zhou Zhi-min, Xue Guo-yi · Modern Radar · 2004
The design and implementation of a new signal processing architecture in radar based on multi-DSP, FPGA and CPLD were studied in this paper. Some rules and methods for algorithm and architecture mapping were presented and discussed. Multi ADSP-21161Ns and V2 FPGA, CPLD were taken as examples to describe the details during design and implementation. This system has proved to be a real-time one and could be applied to many applications in radar systems. [