A Hardware Implementation of Context-based Adaptive Binary Arithmetic Coding
Wu Kai · Microelectronics & Computer · 2006
VLSI implementation of Context-based Adaptive Binary Arithmetic Coding in H.264 is presented in this paper. We use a pre-computed lookup table to implement multiplication operation in arithmetic coding. Pipeline in this design is used to improve the speed of the throughput. It is described with Verilog language,and the arithmetic coder is implemented on the ALTERA FPGA. Simulation results show that this kind of arithmetic coder with pipeline architecture can achieve a good coding speed.