Design of High-Performance and Low-Power Pulsed Flip-Flops
Xun Chen · Microelectronics & Computer · 2008
In this paper,a high-performance and low-power flip-flop(SJLFF) is proposed.It is base on a data-transition look-ahead technology and static structure.The power consumption in SJLFF is reduced by preventing redundant internal switching activities.This SLJFF not only reduces the internal switching activities,but also maintain small D-to-Q delay characteristics by improving stactic structure.compared to other one low-power flip-flop(CDFF),with a data-swiching activity of 49%,the proposed flop-flip can save up to 25% of the PDP.