Realization and Comparison of Block Cipher Modules using VHDL and VERILOG
Long Shu-yuan · Communications technology · 2008
Block cipher is a kind of cipher structure.For its very fast encryption speed,the block cipher is still widely used in data encryption field.Nowadays,the main studying direction for block cipher focuses on the study of new types,the study of block cipher realization,the study of block cipher components and so on.In this paper,seven block cipher modules from the five AES candidates are selected,then realized with VHDL and Verilog.The consumption of resources between the two are analyzed and compared.Then the AES,a typical block cipher is selected and realized with VHDL and Verilog.The results are :1)for the small block cipher modules,there is little difference on the consumption of resources; 2)for complex modules and AES,the realization with Verilog consumes less resources than the realization with VHDL,but the speed is slower.