Research of a Load-Balanced Algorithm Based on Flow Mapping

Jin Su · Chinese Journal of Computers · 2012

Network operators would like high capacity router architectures that can offer guaranteed throughput,scalability and maintain packet ordering.However,current centralized crossbar-based architectures cannot scale to higher performance and port counts.The load-balanced switch architectures rely on two identical stages of fixed configuration meshes appear to be an effective way to scale Internet routers to very high capacities,they have the critical problem of packet mis-sequence with reordering complexity of O(N2).In this paper,we propose a region equalization architecture,in which every k consecutive intermediate inputs are organized as a region and each input port adopts a Uniform Fine-grain Frame Spreading(UFFS-k,where k is the aggregate factor) algorithm assigning k cells of the same flow to the fixed mapping region in a fine-grain manner during k successive external time slots.We give theoretical proofs that 100% throughput and packet ordering can be achieved by using UFFS-k algorithm at each input.To avoid traffic concentration in regions,a dual-rotation mapping algorithm is used to construct a mapping relationship between flows from different inputs and regions.Furthermore,in order to distribute input traffic equally among the intermediate inputs,the UFFS-k algorithm dispatches each unit frame according to a global traffic distribution matrix maintained at each input.It is proofed that for each output port j,the lengths of OQj are equal for the same region and the lengths OQj differ by at most 1 for any two different regions,thus achieving 100% load balancing degree.The UFFS-k algorithm is distributed and can operate independently in each input.It spreads each flow to intermediate inputs according to the mapping relationship between flows to regions as well as traffic distribution state.As the simulation results demonstrate,when k=2,UFFS-k offers improved delay performance among existing scheduling algorithms that guarantee packet ordering.

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